1. Field of the Invention
The described technology relates generally to a thin film transistor substrate and an organic light emitting diode (OLED) display including the same.
2. Description of the Related Art
A thin film transistor (TFT) array has been used in various electronic devices such as flat panel displays. For example, the thin film transistor is used as a switch or a driving element in a flat display device such as a liquid crystal display (LCD), an organic light emitting diode display (OLED display), an electrophoretic display, and the like.
The thin film transistor includes a gate electrode connected to a gate line transmitting a scan signal, a source electrode connected to a data line transmitting a signal to be applied to a pixel electrode, a drain electrode facing the source electrode, and a semiconductor electrically connected with the source electrode and the drain electrode.
The semiconductor is an element important for defining the characteristics of the thin film transistor. As such a semiconductor, silicon (Si) has been most frequently used. Silicon is classified as one of amorphous silicon and polysilicon according to its crystalline shape. Amorphous silicon is limited in its use for the manufacture of high-performance elements because, while the associated manufacturing process is simple, charge mobility in the material is low. The use of polysilicon allows for high charge mobility, but the associated manufacturing process has some complexity and a high cost because crystallizing the silicon is required.
In order to complement the use of amorphous silicon and polysilicon as options for the manufacture of high-performance elements, a search has been conducted for a thin film transistor semiconductor that is an oxide semiconductor, has high electron mobility, exhibits a high on/off ratio of current in associated devices as compared with amorphous silicon, has low cost and has high uniformity as compared with polysilicon.
In addition, finding a method for improving current flow efficiency by forming connecting wiring using a metal having low resistivity has been very important here.
However, when the thickness of the metal wiring is increased to form low-resistive wiring, an undercut occurs due to skew during wet-etching. The undercut reduces current flow in the wiring; the size of the wiring can be increased by as much as the amount of the undercut in order to compensate, but the size of the transistor is then increased correspondingly.
As described below, when the size of the transistor is increased, parasitic capacitance is increased. To deal with this, capacitance of the capacitor in the circuit should be proportionally increased, and this is accomplished by increasing the area of the capacitor.
Further, as described below, when the size of the transistor is increased and the area of the capacitor is increased, the aperture ratio of the pixels is decreased.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the described technology and therefore it may contain information that does not form the prior art that is known to a person of ordinary skill in the art.